Alexander Novickis

Alexander Novickis

Experienced Electrical Engineer | UC Berkeley Alum

20 yrs experience · <10 hrs/week

About

With a background in electrical engineering, this professional has held various roles in the technology industry. Their experience includes working as a Principal Electrical Engineer at Ree Technology GmbH, leading electrical engineering projects at Polysync Technologies, and serving as a Sr H/W Engineer at APCON. They have also worked at companies such as Intel, Xerox, and IBM, gaining expertise in wireless modeling, firmware development, and RTL design. Their educational journey includes studying at UC Berkeley and Santa Rosa Junior College. With a wealth of experience in developing cutting-edge systems for automotive space and leading electrical engineering projects, this individual has a strong foundation in hardware and firmware engineering.

Skills

AltiumAltium DesignerAssembly LanguageCC Programming LanguageC++Circuit DesignCircuitsCode ArchitectureCodingCompetitive AnalysisComputer NetworkingDebuggingDesignDesign ThinkingDockerElectrical DesignElectrical EngineeringElectronic EngineeringElectronic RepairEmbedded SystemsEngineeringFPGAFPGAsFirmwareGitImage processingJMPJack-of-all TradesJavaJavascriptJupyter NotebookLTspiceLinuxMongoDBMySQLObject-oriented programmingPCB DesignPacket AnalysisPascalPersonableProcess ImprovementProgram CoordinationProgram ManagementProgrammingPythonRustSecurity AlgorithmsSiemens NXSoftware ArchitectureSoftware DevelopmentSoftware EngineeringSpring BootSystems DesignSystems EngineeringTechnical ConsultancyTechnologyTroubleshootingUnix Shell ScriptingVerilogVersion ControlVisual BasicmacOS

Experience

  • Principal Electrical Engineer · Ree Technology GmbH03-01-2020

    Developing leading edge systems for automotive space

  • Lead Electrical Engineer · Polysync Technologies10-01-2019 – 03-01-2020

    Responsible for leading electrical engineering projects

  • Sr H/W Engineer · APCON10-01-2007 – 03-01-2020

    VHDL / Verilog implementation and simulation, board level design of freescale based controller card including USB2, SD, CF, SATAII, PCIe, PCI, 4xGE. Adaption of linux for all devices as needed. Architect interconnect for multi board system. Physical layer modeling in Ansoft for 10GE over FR4.

  • Sr. RTL Architect / Engineer · Coe Newnes-McGehee01-01-2005 – 01-01-2007

    Led the debugging and re-architecting of RTL implementation in a 24 FPGA Xilinx system. Directed efforts across a 5 designer team. Converted from Leonardo precision to Synplicity and performed floor planning to achieve timing.

  • Owner · DevLabs01-01-1998 – 01-01-2007

    CEO/CTO - Collection of consulting assignments including circuit design reviews, firmware design or reviews, and some EMC/SI design of experiments

  • Wireless Modeling and Simulations Engineer · Intel01-01-2004 – 12-01-2004

    Automated and designed experiments for microwave propagation channel modeling using MatLab, XFTD, Wireless Insite and other tools. Directed efforts for field experiments for 802.11 throughput and protocol simulations.

  • Applications Engineer · Xerox01-01-2003 – 01-01-2004

    Supported customized solutions in new product introduction in document systems. Monitored field reports and identified and tracked bugs to resolution in firmware, hardware, and drivers.

  • Sr. Hardware / Firmware Engineer · Seitz & Associates01-01-2002 – 01-01-2003

    Developed DSP system and real-time DSP code for medical instrumentation

  • Firmware Team Lead and RTL design · IBM01-01-2000 – 01-01-2001

    Developed firmware for built-in server diagnostics for NUMA design. Also involved in RTL design and verification.

  • DSP engineer HW/SW · Oxford International01-01-1999 – 01-01-2001

    Developed TI DSP code for medical applications

Education

  • UC Berkeley
  • Santa Rosa Junior College

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